- Patent Title: DC offset cancellation circuit and DC offset cancellation method
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Application No.: US16969988Application Date: 2018-03-07
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Publication No.: US11264956B2Publication Date: 2022-03-01
- Inventor: Kexun Zhang , Junhua Ge , Jie Zhou , Jianhua Pan
- Applicant: XIAMEN UX HIGH-SPEED IC CO., LTD.
- Applicant Address: CN Fujian
- Assignee: XIAMEN UX HIGH-SPEED IC CO., LTD.
- Current Assignee: XIAMEN UX HIGH-SPEED IC CO., LTD.
- Current Assignee Address: CN Fujian
- Agent Leong C. Lei
- International Application: PCT/CN2018/078202 WO 20180307
- International Announcement: WO2019/169565 WO 20190912
- Main IPC: H03F3/16
- IPC: H03F3/16 ; H03F3/45 ; H03F1/02 ; H03K5/24
Abstract:
A DC offset cancellation circuit and a DC offset cancellation method are disclosed. The DC offset cancellation circuit comprises a high-speed amplifier, a voltage comparator, a microprocessor, and a digital-to-analog converter. The high-speed amplifier comprises an input stage with a DC offset cancellation function, an amplification stage, and an output buffer stage. The voltage comparator is connected to the output buffer stage. The microprocessor is connected to the voltage comparator. The digital-to-analog converter is connected to the microprocessor. The digital-to-analog converter is connected to the input stage.
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