Devices, systems and methods for improving the convergence of a bit-flipping decoder in a non-volatile memory are described. An example method includes receiving a noisy codeword that is based on a transmitted codeword generated from an irregular QC-LDPC code, the irregular QC-LDPC code having an associated parity matrix comprising a plurality of columns of circulant matrices, computing a plurality of flipping energies for each column of a first subset of columns from the plurality of columns of circulant matrices, computing, based on the plurality of flipping energies, one or more metrics, selecting, based on the one or more metrics, a second subset of columns from the first subset of columns in an order that is different from a sequential indexing order of the second subset of columns, determining, based on processing the second subset of columns using a vertically shuffled scheduling operation, a candidate version of the transmitted codeword.