A memory controller for controlling an operation of a semiconductor memory device including a memory block including a plurality of sub-blocks. The memory controller includes a randomizer. The randomizer includes: seed table storage configured to store a plurality of seed tables respectively corresponding to the plurality of sub-blocks, and to generate a seed, based on sub-block information of received original data; a random sequence generator configured to generate a random sequence, based on the seed generated by the seed table storage; and an operating component configured to generate random data, based on the random sequence and the original data.