Invention Grant
- Patent Title: Integrated circuit including supervia and method of making
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Application No.: US16530770Application Date: 2019-08-02
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Publication No.: US11270936B2Publication Date: 2022-03-08
- Inventor: Kam-Tou Sio , Jiann-Tyng Tzeng , Wei-Cheng Lin
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L21/768 ; H01L23/528

Abstract:
An integrated circuit includes a substrate and a first conductive line extending in a first direction parallel to a top surface of the substrate, wherein the first conductive line is a first distance from the top surface of the substrate. The integrated circuit further includes a second conductive line extending in a second direction parallel to the top surface of the substrate, wherein the second conductive line is a second distance from the top surface of the substrate, and the second distance is greater than the first distance. The integrated circuit further includes a third conductive line extending in the first direction, wherein the second conductive line is a third distance from the top surface of the substrate, and the third distance is greater than the second distance. The integrated circuit further includes a supervia directly connected to the first conductive line and the third conductive line.
Information query
IPC分类: