Invention Grant
- Patent Title: Structure and formation method of chip package with shielding structure
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Application No.: US16284630Application Date: 2019-02-25
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Publication No.: US11270953B2Publication Date: 2022-03-08
- Inventor: Po-Yao Chuang , Po-Hao Tsai , Shin-Puu Jeng , Shuo-Mao Chen , Ming-Chih Yew
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L23/552
- IPC: H01L23/552 ; H01L23/538 ; H01L25/065 ; H01L23/31 ; H01L21/48 ; H01L25/00 ; H01L21/56 ; H05K1/02 ; H01L23/498 ; H01L25/16 ; H01L23/00

Abstract:
Structures and formation methods of a chip package are provided. The method includes forming multiple conductive structures over a carrier substrate. The method also includes disposing a semiconductor die over the carrier substrate such that the conductive structures surround the semiconductor die. The method further includes forming a protective layer to surround the conductive structures and the semiconductor die. In addition, the method includes disposing a shielding element over the semiconductor die and the conductive structures. The shielding element is electrically connected to the conductive structures.
Public/Granted literature
- US20200075503A1 STRUCTURE AND FORMATION METHOD OF CHIP PACKAGE WITH SHIELDING STRUCTURE Public/Granted day:2020-03-05
Information query
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