Invention Grant
- Patent Title: Systems and methods for memory device power off
-
Application No.: US17082964Application Date: 2020-10-28
-
Publication No.: US11276455B1Publication Date: 2022-03-15
- Inventor: Takamasa Suzuki , Yasushi Matsubara , John D. Porter , Ki-Jun Nam
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Fletcher Yoder, P.C.
- Main IPC: G06F1/26
- IPC: G06F1/26 ; G11C11/4072 ; G11C11/4074 ; G11C7/06 ; G11C5/06 ; G11C11/4091

Abstract:
A memory device is provided. The memory device includes a memory bank configured to store data in one or more memory cells. The memory device further includes a sense amplifier and associated circuitry configured to detect a first threshold representative of a first external voltage ramping down during a power off of the memory device, and one or more switches triggered via the sense amplifier and associated circuitry to provide for a power off sequence for the memory bank based on using a second external voltage ramping down during the power off of the memory device.
Information query