Invention Grant
- Patent Title: D-type flip-flop circuit
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Application No.: US17059602Application Date: 2019-05-30
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Publication No.: US11277122B2Publication Date: 2022-03-15
- Inventor: Kazutoshi Kobayashi , Jun Furuta , Kodai Yamada
- Applicant: NATIONAL UNIVERSITY CORPORATION KYOTO INSTITUTE OF TECHNOLOGY , Dolphin Design
- Applicant Address: JP Kyoto; FR Meylan
- Assignee: NATIONAL UNIVERSITY CORPORATION KYOTO INSTITUTE OF TECHNOLOGY,Dolphin Design
- Current Assignee: NATIONAL UNIVERSITY CORPORATION KYOTO INSTITUTE OF TECHNOLOGY,Dolphin Design
- Current Assignee Address: JP Kyoto; FR Meylan
- Agency: Noblitt & Newson, PLLC
- Priority: JPJP2018-106763 20180604
- International Application: PCT/JP2019/021613 WO 20190530
- International Announcement: WO2019/235363 WO 20191212
- Main IPC: H03K3/3562
- IPC: H03K3/3562 ; H01L27/12 ; H01L21/762
Abstract:
A D-type flip-flop circuit 1 has a structure in which a pMOS transistor p8 and an nMOS transistor n8 are added to a general D-type flip-flop circuit comprising pMOS transistors p1 to p7, p11 to p15 and nMOS transistors n1 to n7, n11 to n15.
Public/Granted literature
- US20210226616A1 D-TYPE FLIP-FLOP CIRCUIT Public/Granted day:2021-07-22
Information query
IPC分类:
