A control of a memory system includes firmware and one error correction code (ECC) module. The module includes a power control engine and ECC components, each ECC component including a power monitor and a power controller. The firmware configures a window of time and a power consumption rate of a select ECC component depending on characteristics of the memory system. The power monitor of the select ECC component measures a power consumption of the select ECC component within the window. The power control engine receives the measurement of power consumption, decides a next power level for the select ECC component, and controls the power controller of the select ECC component such that the select ECC component operates at the next power level.