A pixel circuit includes a liquid crystal capacitor, a memory circuit, a driving circuit, a mode-switching circuit, and a control circuit. The memory circuit is configured to store a status signal. The driving circuit includes a first terminal configured to receive a data voltage and a second terminal electrically coupled to a first terminal of the liquid crystal capacitor, and the driving circuit is configured to be ON or OFF according to a scan signal selectively. The mode-switching circuit is configured to be ON or OFF according to a mode-switching signal selectively. The control signal is electrically coupled to the mode-switching circuit at a first node, and is configured to control the voltage level of the first node corresponding to the status signal, and output a display voltage to the liquid crystal capacitor via the mode-switching circuit when the mode-switching circuit is ON.