Invention Grant
- Patent Title: Sensing component encapsulated by an encapsulation layer with a roughness surface having a hollow region
-
Application No.: US17031915Application Date: 2020-09-25
-
Publication No.: US11289396B2Publication Date: 2022-03-29
- Inventor: Yung-Chi Chu , Hung-Jui Kuo , Yu-Hsiang Hu , Sih-Hao Liao , Tian Hu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/02
- IPC: H01L23/02 ; H01L23/12 ; H01L21/00 ; H01L21/4763 ; H01L23/31 ; H01L23/00 ; H01L23/58 ; H01L21/56 ; H01L23/48

Abstract:
A semiconductor package includes a semiconductor die including a sensing component, an encapsulant extending along sidewalls of the semiconductor die, a through insulator via (TIV) and a dummy TIV penetrating through the encapsulant and disposed aside the semiconductor die, a patterned dielectric layer disposed on the encapsulant and exposing the sensing component of the semiconductor die, a conductive pattern disposed on the patterned dielectric layer and extending to be in contact with the TIV and the semiconductor die, and a first dummy conductive pattern disposed on the patterned dielectric layer and connected to the dummy TIV through an alignment opening of the first patterned dielectric layer. The semiconductor die is in a hollow region of the encapsulant, and a top width of the hollow region is greater than a width of the semiconductor die.
Public/Granted literature
- US20210098328A1 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF Public/Granted day:2021-04-01
Information query
IPC分类: