- Patent Title: Integrated circuit testing for integrated circuits with antennas
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Application No.: US15930189Application Date: 2020-05-12
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Publication No.: US11293968B2Publication Date: 2022-04-05
- Inventor: Jeffrey Sherry
- Applicant: Johnstech International Corporation
- Applicant Address: US MN Minneapolis
- Assignee: Johnstech International Corporation
- Current Assignee: Johnstech International Corporation
- Current Assignee Address: US MN Minneapolis
- Agency: Hamre, Schumann, Mueller & Larson, P.C.
- Main IPC: G01R31/28
- IPC: G01R31/28 ; H01Q1/40 ; H01Q1/22 ; G01R31/319

Abstract:
A testing system and method for testing integrated circuits with radio frequency (RF) antennas is disclosed. The system includes an alignment plate for receiving a device under test (DUT) having an RF transmitting antenna, an enclosure surrounding but separated from the transmitting antenna, a receiving antenna in a telescopic enclosure, and a conversion circuit connected to the receiving antenna. The conversion circuit is configured to convert an RF output from the DUT to a direct current (DC) voltage. The DC voltage is used as a proxy for the RF output to test the DUT. When testing chips with RF ports, the chip or ports are surrounded by the enclosure which is non-radio reflective and includes antennas for receiving RF outputs disbursed around the enclosure, or a single antenna. If multiple receiving antennas are used, sequential testing can also detect directional transmission patterns to confirm that the direction is correctly calibrated.
Public/Granted literature
- US20210356511A1 INTEGRATED CIRCUIT TESTING FOR INTEGRATED CIRCUITS WITH ANTENNAS Public/Granted day:2021-11-18
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