Invention Grant
- Patent Title: System and method for semiconductor device testing
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Application No.: US16867999Application Date: 2020-05-06
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Publication No.: US11293974B2Publication Date: 2022-04-05
- Inventor: Hao Chen , Mill-Jer Wang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: G01R31/28
- IPC: G01R31/28

Abstract:
A testing system includes a load board that includes a first circuit board, a first external connector attached to the first circuit board, and a thermal module configured to hold a system-on-wafer structure including a connector and a socket, a connector structure including a second circuit board, wherein the second circuit board is electrically connected to the first external connector, and a second external connector configured to connect to the connector of the system-on-wafer structure, and a test structure configured to connect to the socket of the system-on-wafer structure, the test structure including a third circuit board and pins, wherein adjacent pairs of pins of the test structure are electrically coupled through the third circuit board to form a continuous conductive path extending alternately between the system-on-wafer structure and the adjacent pairs of pins of the test structure.
Public/Granted literature
- US20210096173A1 SYSTEM AND METHOD FOR SEMICONDUCTOR DEVICE TESTING Public/Granted day:2021-04-01
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