Invention Grant
- Patent Title: System and method for advanced detection of failures in a network-on-chip
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Application No.: US16717969Application Date: 2019-12-17
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Publication No.: US11294757B2Publication Date: 2022-04-05
- Inventor: Jean-Philippe Loison , Benoit De Lescure
- Applicant: ARTERIS, INC.
- Applicant Address: US CA Campbell
- Assignee: ARTERIS, INC.
- Current Assignee: ARTERIS, INC.
- Current Assignee Address: US CA Campbell
- Agency: Dana Legal Services
- Agent Jubin Dana
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/07 ; G06F11/30

Abstract:
System and method are disclosed to detect potential failures in a network-on-chip (NoC) before the potential failures happen. The system tests connectivity from a master to all slaves by sending scrub transactions to test all paths. The scrub transactions are identified using a scrub bit. The scrub transactions are generated at a master scrubbing block/unit and terminated at a slave scrubbing block/unit. The slave scrubbing block sends scrub responses to the scrub transactions along the response path. The scrub responses to the scrub transactions are generated at the slave scrubbing block and terminated at the master scrubbing block. This allows detection of potential failures, which are reported to a system monitor. If a potential failure is detected, the system transitions to a fail-safe mode before the failure occurs.
Public/Granted literature
- US20210182134A1 SYSTEM AND METHOD FOR ADVANCED DETECTION OF FAILURES IN A NETWORK-ON-CHIP Public/Granted day:2021-06-17
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