The present disclose is related to a gate drive unit. The gate drive unit may include a shift register; and a signal filter. The signal filter may respectively connect to a clock signal terminal, a filter output terminal, an input terminal and a reset terminal. The signal filter may be configured, under control of an effective signal provided by the input terminal, to transmit a clock signal of the clock signal terminal to the filter output terminal after the input terminal stops providing the effective signal and before the reset terminal provides an effective signal and, under control of an effective signal provided by the reset terminal, to disconnect the clock signal terminal and the filter output terminal.