Invention Grant
- Patent Title: Low-K feature formation processes and structures formed thereby
-
Application No.: US17201691Application Date: 2021-03-15
-
Publication No.: US11295948B2Publication Date: 2022-04-05
- Inventor: Wan-Yi Kao , Chung-Chi Ko , Li Chun Te , Hsiang-Wei Lin , Te-En Cheng , Wei-Ken Lin , Guan-Yao Tu , Shu Ling Liao
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L29/66 ; H01L21/311 ; H01L21/8234 ; H01L27/088 ; H01L21/266 ; H01L21/265 ; H01L21/3065 ; H01L21/3105 ; H01L21/762 ; H01L29/36

Abstract:
Semiconductor device structures having low-k features and methods of forming low-k features are described herein. Some examples relate to a surface modification layer, which may protect a low-k feature during subsequent processing. Some examples relate to gate spacers that include a low-k feature. Some examples relate to a low-k contact etch stop layer. Example methods are described for forming such features.
Public/Granted literature
- US20210202235A1 Low-K Feature Formation Processes and Structures Formed Thereby Public/Granted day:2021-07-01
Information query
IPC分类: