Invention Grant
- Patent Title: Through-substrate vias with improved connections
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Application No.: US16459387Application Date: 2019-07-01
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Publication No.: US11296011B2Publication Date: 2022-04-05
- Inventor: Jing-Cheng Lin , Ku-Feng Yang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/768 ; H01L23/498 ; H01L23/522 ; H01L23/00

Abstract:
A device includes a substrate, and a plurality of dielectric layers over the substrate. A plurality of metallization layers is formed in the plurality of dielectric layers, wherein at least one of the plurality of metallization layers comprises a metal pad. A through-substrate via (TSV) extends from the top level of the plurality of the dielectric layers to a bottom surface of the substrate. A deep conductive via extends from the top level of the plurality of dielectric layers to land on the metal pad. A metal line is formed over the top level of the plurality of dielectric layers and interconnecting the TSV and the deep conductive via.
Public/Granted literature
- US20190326199A1 Through-Substrate Vias with Improved Connections Public/Granted day:2019-10-24
Information query
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