The present disclosure discloses an output circuit having a voltage-withstanding mechanism that includes a PMOS, a NMOS, a voltage-withstanding auxiliary NMOS and a voltage-withstanding auxiliary circuit. The PMOS includes a first source terminal and a first drain terminal coupled to a voltage source and an output terminal and a first gate receiving a first input signal. The NMOS includes a second source terminal and a second drain terminal coupled to a ground terminal and a connection terminal and a second gate receiving a second input signal. The auxiliary NMOS includes a third drain terminal and a third source terminal coupled to the output terminal and the connection terminal. The auxiliary circuit is coupled to the voltage source and a third gate of the auxiliary NMOS and provides a current conducting mechanism and a resistive mechanism respectively when the output terminal is operated at a logic high level and a logic low level.