A signal processing circuit and a driving method thereof, a display panel and a driving method thereof, and a display device are disclosed. The signal processing circuit includes a shunting circuit and N buffer circuits. The shunting circuit includes N output nodes, the N buffer circuits are respectively connected with the N output nodes. The shunting circuit is configured to output input signals to the N output nodes respectively at N different time points in response to control signals. Each of the N buffer circuits is configured to buffer and output the input signal received by a corresponding output node. N is an integer great than or equal to 2.