A flash memory system includes a memory controller, flash memory, power supply circuit, and control circuit. The power supply circuit includes a power supply terminal fed with external power, a step-up circuit for boosting a first voltage associated with the external power and thereby generating a second voltage higher than the first voltage, a capacitor charged at the second voltage, and a first step-down circuit for lowering the second voltage and thereby generating a third voltage lower than the second voltage, and supplying the generated third voltage to the flash memory as the operating voltage. The control circuit includes a circuit for controlling the active or inactive state of the flash memory based on the level of the third voltage, and a circuit for controlling the active or inactive state of the memory controller based on both the levels of the voltage of the external power and the third voltage.