Invention Grant
- Patent Title: Interconnect structure and method for forming the same
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Application No.: US16257809Application Date: 2019-01-25
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Publication No.: US11302570B2Publication Date: 2022-04-12
- Inventor: Hsiang-Wei Liu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L29/49 ; H01L27/1157 ; H01L21/768 ; H01L23/522 ; H01L21/3213 ; H01L21/033 ; H01L21/311

Abstract:
A method for forming an interconnect structure is provided. The method for an interconnect structure includes forming a first metal material over a semiconductor substrate, and forming a first mask element over the first metal material. The first mask element has an opening through the first mask element. The method for forming the interconnect structure also includes forming a second metal material over the first mask element and the first metal material and in the opening, and forming a second mask element corresponding to the opening and over the second metal material. The method for forming the interconnect structure also includes etching the second metal material and the first metal material using the second mask element and the first mask element to form a via and a first metal line respectively.
Public/Granted literature
- US20200243377A1 INTERCONNECT STRUCTURE AND METHOD FOR FORMING THE SAME Public/Granted day:2020-07-30
Information query
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