Invention Grant
- Patent Title: In-situ straining epitaxial process
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Application No.: US16866279Application Date: 2020-05-04
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Publication No.: US11302782B2Publication Date: 2022-04-12
- Inventor: Hsiu-Ting Chen , Yi-Ming Huang , Shih-Chieh Chang , Hsing-Chi Chen , Pei-Ren Jeng
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L29/167 ; H01L29/78 ; H01L29/08 ; H01L29/66 ; H01L29/32

Abstract:
A semiconductor device includes an epitaxial straining region formed within a semiconductor substrate, the straining region being positioned adjacent to a gate stack, the gate stack being positioned above a channel. The straining region comprises a defect comprising two crossing dislocations such that a cross-point of the dislocations is closer to a bottom of the straining region than to a top of the straining region. The straining region comprises an element with a smaller lattice constant than a material forming the substrate.
Public/Granted literature
- US20200266274A1 In-Situ Straining Epitaxial Process Public/Granted day:2020-08-20
Information query
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