Invention Grant
- Patent Title: Active low-power termination
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Application No.: US17187308Application Date: 2021-02-26
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Publication No.: US11303276B2Publication Date: 2022-04-12
- Inventor: John Thomas Contreras , Rehan Ahmed Zakai , Srinivas Rajendra , Venkatesh Prasad Ramachandra
- Applicant: Western Digital Technologies, Inc.
- Applicant Address: US CA San Jose
- Assignee: Western Digital Technologies, Inc.
- Current Assignee: Western Digital Technologies, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Patterson & Sheridan, LLP
- Agent Steven H. Versteeg
- Main IPC: H03K19/00
- IPC: H03K19/00 ; H04L25/02 ; H03K21/10 ; H03K19/017

Abstract:
An active termination circuit comprising an input node connected to a transmission line, a first transistor, and a second transistor. The transmission line supplies a signal to the input node. The first transistor is diode connected between a high voltage supply and the input node. The first transistor terminates the signal when the signal is at a low logic level. The second transistor is diode connected between the input node and a low voltage supply. The second transistor terminates the signal when the signal is at a high logic level.
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