Invention Grant
- Patent Title: Perfect detection of concurrent faults in CMOS circuits by exploiting reversible and preservative gates
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Application No.: US17092352Application Date: 2020-11-09
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Publication No.: US11307252B2Publication Date: 2022-04-19
- Inventor: Mustafa Altun , Sajjad Parvin
- Applicant: Istanbul Teknik Universitesi
- Applicant Address: TR Istanbul
- Assignee: Istanbul Teknik Universitesi
- Current Assignee: Istanbul Teknik Universitesi
- Current Assignee Address: TR Istanbul
- Agency: Bayramoglu Law Offices LLC
- Priority: TR2019/17294 20191107
- Main IPC: G01R31/319
- IPC: G01R31/319 ; H03K19/003
Abstract:
A method of perfect detection of concurrent faults in CMOS circuits, using reversible gates and preservative gates is provided. The concurrent faults occurring in the CMOS circuits are detected without being masked by the method. The method includes the following steps: Carrying out functions using the reversible gates and the preservative gates, transforming the reversible gates and the preservative gates into CMOS circuit equivalents.
Public/Granted literature
- US20210141015A1 PERFECT DETECTION OF CONCURRENT FAULTS IN CMOS CIRCUITS BY EXPLOITING REVERSIBLE AND PRESERVATIVE GATES Public/Granted day:2021-05-13
Information query
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