Invention Grant
- Patent Title: Semiconductor structure and method for forming the same
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Application No.: US16862987Application Date: 2020-04-30
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Publication No.: US11309422B2Publication Date: 2022-04-19
- Inventor: Fei Zhou
- Applicant: Semiconductor Manufacturing International (Shanghai) Corporation , Semiconductor Manufacturing International (Beijing) Corporation
- Applicant Address: CN Shanghai; CN Beijing
- Assignee: Semiconductor Manufacturing International (Shanghai) Corporation,Semiconductor Manufacturing International (Beijing) Corporation
- Current Assignee: Semiconductor Manufacturing International (Shanghai) Corporation,Semiconductor Manufacturing International (Beijing) Corporation
- Current Assignee Address: CN Shanghai; CN Beijing
- Agency: Crowell & Moring LLP
- Priority: CN201910696157.5 20190730
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L27/088 ; H01L21/8234 ; H01L29/10 ; H01L29/06

Abstract:
A semiconductor structure and a method for forming the same are provided. One form of the method includes: providing a base, where a channel stack and a tear-off structure span the channel stack being formed on the base, and the channel stack including a sacrificial layer and a channel layer; forming a groove in channel stacks on both sides of a gate structure; laterally etching the sacrificial layer exposed from the groove to form a remaining sacrificial layer; forming a source/drain doped region in the channel layer exposed from the remaining sacrificial layer; forming an interlayer dielectric layer on the base; etching the interlayer dielectric layer on one side of the source region to expose a surface of the channel layer corresponding to the source region; etching the interlayer dielectric layer on one side of the drain region to expose the surface of the channel layer corresponding to the drain region; forming a first metal silicide layer on a surface of the channel layer corresponding to the source region; forming a second metal silicide layer on a surface of the channel layer corresponding to the drain region; forming a first conductive plug covering the first metal silicide layer and a second conductive plug covering the second metal silicide layer. In the present disclosure, contact resistance of the first conductive plug, the second conductive plug, and the source/drain doped region is reduced.
Public/Granted literature
- US20210036146A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME Public/Granted day:2021-02-04
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