A dynamic voltage-to-delay device may have voltage lines for receiving input signals during reset phases, and a current source, connected to the first and second voltage lines, for increasing voltages on the voltage lines during active phases. The voltage-to-delay device may also have comparators, connected to the voltage lines, for generating first and second output signals during the active phases when the voltages on the voltage lines reach a threshold voltage, such that a delay between the output signals is representative of a difference between voltages of the input signals. The voltage-to-delay device may have at least two current sources. The comparators may have a tail node to which a voltage is applied during a reset phase, and a current source for reducing the voltage at the tail node, and thereby reducing a threshold voltage during an active phase.