A pixel compensation circuit is provided. The pixel compensation circuit includes: a first transistor connected to a first scan line, wherein a first terminal of the first transistor is connected to a data line and a second terminal of the first transistor is connected to a second terminal of the driving transistor; a second transistor connected to a first scan line, wherein a first terminal of the second transistor is connected to a first terminal of the driving transistor and a second terminal of the second transistor is connected to a control terminal of the driving transistor; and a third transistor, wherein a control terminal of the third transistor is connected to a control line, a first terminal of the third transistor is connected to a supply voltage line, and a second terminal of the third transistor is connected to the first terminal of the driving transistor.