Invention Grant
- Patent Title: Isolation structure for preventing unintentional merging of epitaxially grown source/drain
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Application No.: US16917778Application Date: 2020-06-30
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Publication No.: US11315924B2Publication Date: 2022-04-26
- Inventor: Ta-Chun Lin , Kuan-Lin Yeh , Chun-Jun Lin , Kuo-Hua Pan , Mu-Chi Chiang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L29/78 ; H01L29/06 ; H01L29/66 ; H01L21/8238 ; H01L21/762 ; H01L21/768
Abstract:
A semiconductor device includes a first active region and a second active region disposed over a substrate. A first source/drain component is grown on the first active region. A second source/drain component is grown on the second active region. An interlayer dielectric (ILD) is disposed around the first source/drain component and the second source/drain component. An isolation structure extends vertically through the ILD. The isolation structure separates the first source/drain component from the second source/drain component.
Public/Granted literature
- US20210408000A1 Isolation Structure for Preventing Unintentional Merging of Epitaxially Grown Source/Drain Public/Granted day:2021-12-30
Information query
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