1.5-transistor (1.5T) one time programmable (OTP) memory with thin gate to drain dielectric and methods thereof
Abstract:
A semiconductor device and methods thereof are disclosed. The proposed semiconductor device includes at least a unit cell wherein the unit cell includes a select transistor, and half of a ground-gate transistor electrically connected to the select transistor, and including a central conductive gate electrode region, two side conductive spacer regions and a gate dielectric layer, wherein a first and a second thicknesses of the gate dielectric layer underneath the two side conductive spacer regions are thinner than a third thickness of the gate dielectric layer underneath the central conductive gate electrode region.
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