Invention Grant
- Patent Title: Memory device with lateral offset
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Application No.: US16742113Application Date: 2020-01-14
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Publication No.: US11315945B2Publication Date: 2022-04-26
- Inventor: Erh-Kun Lai , Hsiang-Lan Lung
- Applicant: MACRONIX INTERNATIONAL CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: MACRONIX INTERNATIONAL CO., LTD.
- Current Assignee: MACRONIX INTERNATIONAL CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: McClure, Qualey & Rodack, LLP
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H01L27/1157

Abstract:
A memory device includes a stack structure, a memory element, a channel element, and a semiconductor layer. The stack structure includes a source layer, an insulating layer and gate electrode layers. The insulating layer is on the source layer. The gate electrode layers are on the insulating layer. The memory element is on electrode sidewall surfaces of the gate electrode layers. Memory cells are defined in the memory element between the channel element and the gate electrode layers. The semiconductor layer is electrically connected between the source layer and the channel element. The semiconductor layer and the source layer have an interface therebetween. The interface is at a location on an inside of an insulating sidewall surface of the insulating layer with a lateral offset relative to the insulating sidewall surface.
Public/Granted literature
- US20210217767A1 MEMORY DEVICE Public/Granted day:2021-07-15
Information query
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