Invention Grant
- Patent Title: Methods of testing multiple dies
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Application No.: US16901966Application Date: 2020-06-15
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Publication No.: US11320478B2Publication Date: 2022-05-03
- Inventor: Rubin Ajit Parekhji , Mahesh M. Mehendale , Vinod Menezes , Vipul K. Singhal
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Charles A. Brill; Frank D. Cimino
- Priority: IN6457/CHE/2015 20151201
- Main IPC: G01R33/00
- IPC: G01R33/00 ; G01R31/28 ; G01R31/3185 ; G01R1/04 ; G01R1/067

Abstract:
In a method of testing a semiconductor wafer, a probe tip contacts a pad in a scribe line space between facing sides of first and second dies. The probe tip is electrically coupled to an automated test equipment (ATE). The second die is spaced apart from the first die. The scribe line space includes an interconnect extending along at least an entire length of the facing sides of the first and second dies. The pad is electrically coupled through the interconnect to at least one of the first or second dies. With the ATE, circuitry is tested in at least one of the first or second dies. The pad is electrically coupled through the interconnect to the circuitry.
Public/Granted literature
- US20200379031A1 METHODS OF TESTING MULTIPLE DIES Public/Granted day:2020-12-03
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