Invention Grant
- Patent Title: Test method and test system
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Application No.: US17167382Application Date: 2021-02-04
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Publication No.: US11320484B2Publication Date: 2022-05-03
- Inventor: Shu-Liang Ning
- Applicant: Changxin Memory Technologies, Inc.
- Applicant Address: CN Anhui
- Assignee: Changxin Memory Technologies, Inc.
- Current Assignee: Changxin Memory Technologies, Inc.
- Current Assignee Address: CN Anhui
- Agency: Sheppard Mullin Richter & Hampton LLP
- Priority: CN201811137146.5 20180928,CN201821631055.2 20180928
- Main IPC: G01R31/3177
- IPC: G01R31/3177 ; G01R31/317 ; G01R31/3187 ; G01R31/3185

Abstract:
The present invention provides a method, device, and system for testing devices under testing (DUTs). The method comprises: sending a scan activated signal and a synchronous clock signal via the second signal line, and sending a first preset signal via the serial signal line, wherein each bit of the first preset signal is transmitted to a corresponding scan chain unit in a sequence of serial connection of the plurality of scan chain units with according to the synchronous clock signal, the corresponding scan chain unit is one of the plurality of scan chain units connected serially and coupled to the plurality of DUTs via a third signal line; sending a scan deactivated signal via the second signal line, to deactivate the scan chain units from identifying and receiving the first preset signal; and sending a second preset signal via the second signal line, and sending a test signal via the first signal line.
Public/Granted literature
- US20210156914A1 TEST METHOD AND TEST SYSTEM Public/Granted day:2021-05-27
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