Invention Grant
- Patent Title: Multi-die stacks with power management
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Application No.: US16146463Application Date: 2018-09-28
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Publication No.: US11320883B2Publication Date: 2022-05-03
- Inventor: Rajashree Baskaran , Maruti Gupta Hyde , Min Suet Lim , Van Le , Hebatallah Saadeldeen
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Hanley, Flight & Zimmerman, LLC
- Main IPC: G06F1/3203
- IPC: G06F1/3203 ; G06F1/3234 ; H01L25/16 ; G06N3/063 ; H01L25/065 ; G06F1/20 ; H01L25/18 ; G06N3/04 ; G06N3/08

Abstract:
Methods and apparatus to provide power management for multi-die stacks using artificial intelligence are disclosed. An example multi-die package includes a computer processor unit (CPU) die, a memory die stacked in vertical alignment with the CPU die, and artificial intelligence (AI) architecture circuitry to infer a workload for at least one of the CPU die or the memory die. The AI architecture circuitry is to manage power consumption of at least one of the CPU die or the memory die based on the inferred workload.
Public/Granted literature
- US20190050040A1 MULTI-DIE STACKS WITH POWER MANAGEMENT Public/Granted day:2019-02-14
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