Invention Grant
- Patent Title: Managing storage of multiple plane parity data in a memory sub-system
-
Application No.: US16854429Application Date: 2020-04-21
-
Publication No.: US11321173B2Publication Date: 2022-05-03
- Inventor: Xiangang Luo , Jianmin Huang , Lakshmi Kalpana K. Vakati , Harish R. Singidi
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Lowenstein Sandler LLP
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G06F3/06

Abstract:
Host data to be written to a storage area including a set of multiple planes of a memory device is received. A first parity generation operation based on a portion of the set of multiple planes of the host data to generate a set of multi-plane parity data is executed. The set of multi-plane parity data is stored in in a cache memory of a controller of a memory sub-system. A second parity generation operation based on the set of the multiple planes of the host data to generate a set of multi-page parity data is executed. The set of multi-page parity data in the cache memory of the controller of the memory sub-system is stored. A data recovery operation is performed based on the set of multi-plane parity data and the set of multi-page parity data.
Public/Granted literature
- US20210200637A1 MANAGING STORAGE OF MULTIPLE PLANE PARITY DATA IN A MEMORY SUB-SYSTEM Public/Granted day:2021-07-01
Information query