Invention Grant
- Patent Title: Integrated circuit, bus system and scheduling method
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Application No.: US17010401Application Date: 2020-09-02
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Publication No.: US11321258B2Publication Date: 2022-05-03
- Inventor: Kang-Fu Chiu , Chih-Hung Huang , Chun-Wei Chiu , Hao-Yang Chang
- Applicant: Nuvoton Technology Corporation
- Applicant Address: TW Hsinchu Science Park
- Assignee: Nuvoton Technology Corporation
- Current Assignee: Nuvoton Technology Corporation
- Current Assignee Address: TW Hsinchu Science Park
- Agency: Muncy, Geissler, Olds & Lowe, P.C.
- Priority: TW108132900 20190912
- Main IPC: G06F1/26
- IPC: G06F1/26 ; G06F13/42 ; G06F13/362

Abstract:
An integrated circuit includes a specific pin, an output circuit, a voltage detector, and a controller. The output circuit is coupled to the specific pin. The voltage detector obtains a detection voltage value from the specific pin. In response to an alert request, the controller provides a control signal to the output circuit based on the detection voltage value, so as to selectively control the output circuit to transmit the alert signal to the specific pin. When the control signal instructs the integrated circuit to operate in a blocking mode, the output circuit blocks the alert signal from being transmitted to the specific pin. When the control signal instructs the integrated circuit to operate in a transmission mode, the output circuit transmits the alert signal to the specific pin.
Public/Granted literature
- US20210081341A1 INTEGRATED CIRCUIT, BUS SYSTEM AND SCHEDULING METHOD Public/Granted day:2021-03-18
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