Invention Grant
- Patent Title: Error concealment in split rendering
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Application No.: US17037566Application Date: 2020-09-29
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Publication No.: US11321905B2Publication Date: 2022-05-03
- Inventor: Mina Ayman Saleh Yanni Makar , Soumyajit Bijankumar Deb , Bojan Vrcelj , Arjun Sitaram , Dieter Schmalstieg
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Arent Fox LLP
- Agent Campbell C. Chiang
- Main IPC: G06T15/00
- IPC: G06T15/00 ; G06T9/00

Abstract:
Graphics processing in a client device includes receiving, as part of a vector streaming split rendering process, a bit stream encoding a sequence of shading atlases of the process. Each shading atlas includes blocks. The client decodes a particular shading atlas of the sequence of shading atlases, and determines that a particular block of the particular shading atlas was unsuccessfully decoded. The client identifies a stored block of a prior shading atlas of the sequence of shading atlases as a successfully decoded earlier version of the particular block. The client renders the particular shading atlas using the stored block instead of the particular block.
Public/Granted literature
- US20210312691A1 ERROR CONCEALMENT IN SPLIT RENDERING Public/Granted day:2021-10-07
Information query
IPC分类:
G | 物理 |
G06 | 计算;推算或计数 |
G06T | 一般的图像数据处理或产生 |
G06T15/00 | 3D〔三维〕图像的加工 |