Invention Grant
- Patent Title: Buried damage layers for electrical isolation
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Application No.: US16806383Application Date: 2020-03-02
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Publication No.: US11322357B2Publication Date: 2022-05-03
- Inventor: Siva P. Adusumilli , Anthony K. Stamper , Michel J. Abou-Khalil , John J. Ellis-Monaghan , Bojidha Babu
- Applicant: GLOBALFOUNDRIES U.S. Inc.
- Applicant Address: US CA Santa Clara
- Assignee: GLOBALFOUNDRIES U.S. Inc.
- Current Assignee: GLOBALFOUNDRIES U.S. Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Thompson Hine LLP
- Agent Francois Pagette
- Main IPC: H01L21/265
- IPC: H01L21/265 ; H01L21/762 ; H01L21/324 ; H01L29/04

Abstract:
Structures including electrical isolation and methods of forming a structure including electrical isolation. A first polycrystalline layer is located in a substrate, and a second polycrystalline layer is positioned between the first polycrystalline layer and a top surface of the substrate. The substrate includes a first portion of the single-crystal semiconductor material that is positioned between the second polycrystalline layer and the top surface of the substrate. The substrate includes a second portion of the single-crystal semiconductor material that is positioned between the first polycrystalline layer and the second polycrystalline layer. The first polycrystalline layer has a thickness. The second polycrystalline layer has a portion with a thickness that is greater than the thickness of the first polycrystalline layer.
Public/Granted literature
- US20210272812A1 BURIED DAMAGE LAYERS FOR ELECTRICAL ISOLATION Public/Granted day:2021-09-02
Information query
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