Invention Grant
- Patent Title: Etch stop layer for semiconductor devices
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Application No.: US16043343Application Date: 2018-07-24
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Publication No.: US11322396B2Publication Date: 2022-05-03
- Inventor: Szu-Ping Tung , Jen Hung Wang , Shing-Chyang Pan
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L21/4763 ; H01L21/768 ; H01L23/532 ; H01L23/522 ; H01L23/485

Abstract:
A semiconductor device includes a substrate, a first conductive feature over a portion of the substrate, and an etch stop layer over the substrate and the first conductive feature. The etch stop layer includes a silicon-containing dielectric (SCD) layer and a metal-containing dielectric (MCD) layer over the SCD layer. The semiconductor device further includes a dielectric layer over the etch stop layer, and a second conductive feature in the dielectric layer. The second conductive feature penetrates the etch stop layer and electrically connects to the first conductive feature.
Public/Granted literature
- US20180350666A1 Etch Stop Layer for Semiconductor Devices Public/Granted day:2018-12-06
Information query
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