- Patent Title: Threshold voltage tuning for fin-based integrated circuit device
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Application No.: US16199498Application Date: 2018-11-26
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Publication No.: US11322410B2Publication Date: 2022-05-03
- Inventor: Chung-Liang Cheng , Wei-Jen Chen , Yen-Yu Chen , Ming-Hsien Lin
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L27/02
- IPC: H01L27/02 ; H01L21/8234 ; H01L21/3213 ; H01L27/092 ; H01L21/8238 ; H01L21/02 ; H01L27/088 ; H01L27/12

Abstract:
Methods for tuning threshold voltages of fin-like field effect transistor (FinFET) devices are disclosed herein. An exemplary integrated circuit device includes a high voltage n-type FinFET, a high voltage p-type FinFET, a low voltage n-type FinFET, and a low voltage p-type FinFET. Threshold voltages of the high voltage n-type FinFET and the high voltage p-type FinFET are greater than threshold voltages of the low voltage n-type FinFET and the low voltage p-type FinFET, respectively. The high voltage n-type FinFET, the high voltage p-type FinFET, the low voltage n-type FinFET, and the low voltage p-type FinFET each include a threshold voltage tuning layer that includes tantalum and nitrogen. Thicknesses of the threshold voltage tuning layer of the low voltage n-type FinFET and the low voltage p-type FinFET are less than thicknesses of the threshold voltage tuning layer of the high voltage n-type FinFET and the high voltage p-type FinFET, respectively.
Public/Granted literature
- US20190139828A1 Threshold Voltage Tuning for Fin-Based Integrated Circuit Device Public/Granted day:2019-05-09
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