- Patent Title: FEOL interconnect used as capacitance over fins instead of gates
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Application No.: US16681869Application Date: 2019-11-13
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Publication No.: US11322439B2Publication Date: 2022-05-03
- Inventor: Michael Sperling , Erik English , Akil Khamisi Sutton , Pawel Owczarczyk
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Jeffrey Ingalls
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L29/94 ; H01L31/062 ; H01L23/522 ; H01L27/088 ; H01L21/8234 ; H01L49/02 ; G06F30/394 ; G06F30/398 ; G06F111/04 ; G06F111/20 ; G06F119/18

Abstract:
Aspects of the invention include forming a semiconductor device. Gates are formed in a first direction over fins, the gates including gate material, the fins being formed in a second direction. Fin interconnects are formed in the first direction over the fins. A dielectric material is formed on the fins, and capacitor interconnects are formed over portions of the dielectric material in the first direction over the fins.
Public/Granted literature
- US20210143095A1 FEOL INTERCONNECT USED AS CAPACITANCE OVER FINS INSTEAD OF GATES Public/Granted day:2021-05-13
Information query
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