A memory package structure includes a substrate, a memory chip and a plurality of resistors. The substrate has a plurality of pins. The pins include a plurality of data pins used to transfer data signal. The memory chip is located on the substrate. A plurality of bonding pads is located on the memory chip. The bonding pads include a plurality of data pads used to receive the data signal from data pins or transfer the data signal from the memory chip. The resistors is located on the substrate. Each data pad is connected to a corresponding one of the data pins through a corresponding one of the resistors.