Invention Grant
- Patent Title: Dual solder methodologies for ultrahigh density first level interconnections
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Application No.: US15845992Application Date: 2017-12-18
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Publication No.: US11322469B2Publication Date: 2022-05-03
- Inventor: Chandramouleeswaran Subramani
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Essential Patents Group, LLP.
- Main IPC: H01L25/18
- IPC: H01L25/18 ; H01L23/00 ; H01L23/31 ; G06F13/10 ; H01L21/56
Abstract:
An apparatus, comprising an integrated circuit (IC) package having at least one solder bond pad, a die having at least one solder bond pad, wherein the die is bonded to the IC package by at least one solder joint between the at least one solder bond pad of the die, and the at least one solder bond pad of the IC package, and an underfill material between the IC package and the die, wherein the at least one solder joint is embedded in the underfill material, and wherein the at least one solder joint comprises a first metallurgy and a second metallurgy.
Public/Granted literature
- US20190189581A1 DUAL SOLDER METHODOLOGIES FOR ULTRAHIGH DENSITY FIRST LEVEL INTERCONNECTIONS Public/Granted day:2019-06-20
Information query
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