At least one of a capacitor or a resistor structure can be formed concurrently with formation of a field effect transistor by patterning a gate dielectric layer into gate dielectric and into a first node dielectric or a first resistor isolation dielectric, and by patterning a semiconductor layer into a gate electrode and into a second electrode of a capacitor or a resistor strip. Contacts are then formed to the capacitor or resistor structure. Sidewall spacers may be formed on the gate electrode prior to patterning the capacitor or resistor contacts to reduce damage to the underlying capacitor or resistor layers.