A stacked semiconductor device includes: a plurality of semiconductor chips that are stacked in a vertical direction, wherein each of the semiconductor chips includes: a plurality of first through-electrodes; a plurality of second through-electrodes positioned adjacent to the first through-electrodes; a first voltage driving circuit suitable for providing the first through-electrodes with a test voltage or a ground voltage based on a first driving control signal; a second voltage driving circuit suitable for providing the second through-electrodes with the test voltage or the ground voltage based on a second driving control signal; and a failure detection circuit suitable for generating a failure signal based on a plurality of first detection signals received through the first through-electrodes and a plurality of second detection signals received through the second through-electrodes.