Invention Grant
- Patent Title: Semiconductor device and fabrication method for semiconductor device
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Application No.: US16638499Application Date: 2018-07-24
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Publication No.: US11329002B2Publication Date: 2022-05-10
- Inventor: Teruyuki Sato , Shinichi Arakawa , Takayuki Enomoto , Yohei Chiba
- Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Applicant Address: JP Kanagawa
- Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Current Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Current Assignee Address: JP Kanagawa
- Agency: Chip Law Group
- Priority: JPJP2017-158724 20170821
- International Application: PCT/JP2018/027747 WO 20180724
- International Announcement: WO2019/039173 WO 20190228
- Main IPC: H01L23/544
- IPC: H01L23/544 ; H01L27/146 ; H01L21/027 ; H01L21/266

Abstract:
Fabrication of an alignment mark in a semiconductor device is simplified. A semiconductor device including a semiconductor substrate, an epitaxial layer, and an alignment mark is provided. The epitaxial layer included in the semiconductor device includes a single-crystalline semiconductor that is epitaxially grown on a surface of the semiconductor substrate included in the semiconductor device. The alignment mark included in the semiconductor device is disposed between the semiconductor substrate and the epitaxial layer.
Public/Granted literature
- US20200303317A1 SEMICONDUCTOR DEVICE AND FABRICATION METHOD FOR SEMICONDUCTOR DEVICE Public/Granted day:2020-09-24
Information query
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