Invention Grant
- Patent Title: Semiconductor package including embedded solder connection structure
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Application No.: US16997623Application Date: 2020-08-19
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Publication No.: US11329029B2Publication Date: 2022-05-10
- Inventor: Sung Ho Cho
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si
- Agency: William Park & Associates Ltd.
- Priority: KR10-2020-0043654 20200409
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/00 ; H01L25/00

Abstract:
A semiconductor package includes a first semiconductor chip including a first chip body portion and a first chip rear bump disposed in a region recessed into the first chip body portion, and a second semiconductor chip stacked on the first semiconductor chip and including a second chip body portion and a second chip front bump protruding from the second chip body portion. The first chip rear bump includes a lower metal layer and a solder layer disposed on the lower metal layer. The second chip front bump is bonded to the solder layer. The second chip front bump is disposed to cover at least the solder layer on a bonding surface of the second chip front bump and the solder layer.
Public/Granted literature
- US20210320086A1 SEMICONDUCTOR PACKAGE INCLUDING EMBEDDED SOLDER CONNECTION STRUCTURE Public/Granted day:2021-10-14
Information query
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