Invention Grant
- Patent Title: Two-terminal biristor with polysilicon emitter layer and method of manufacturing the same
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Application No.: US16607410Application Date: 2019-08-20
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Publication No.: US11329157B2Publication Date: 2022-05-10
- Inventor: Yang-Kyu Choi , Jun Woo Son , Jae Hur
- Applicant: Korea Advanced Institute of Science and Technology
- Applicant Address: KR Daejeon
- Assignee: Korea Advanced Institute of Science and Technology
- Current Assignee: Korea Advanced Institute of Science and Technology
- Current Assignee Address: KR Daejeon
- Agency: Faegre Drinker Biddle & Reath LLP
- Priority: KR10-2018-0096846 20180820
- International Application: PCT/KR2019/010523 WO 20190820
- International Announcement: WO2020/040510 WO 20200227
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L29/78 ; H01L21/02 ; H01L21/3205 ; H01L27/108 ; H01L29/861

Abstract:
A two-terminal biristor in which a polysilicon emitter layer is inserted and a method of manufacturing the same are provided. The method of manufacturing the two-terminal biristor according to an embodiment of the present disclosure includes forming a first semiconductor layer of a first type on a substrate, forming a second semiconductor layer of a second type on the first semiconductor layer, forming a third semiconductor layer of the first type on the second semiconductor layer, and forming a polysilicon layer of the first type on the third semiconductor layer.
Public/Granted literature
- US20200328305A1 TWO-TERMINAL BIRISTOR WITH POLYSILICON EMITTER LAYER AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2020-10-15
Information query
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