Invention Grant
- Patent Title: Process and temperature immunity in circuit design
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Application No.: US16957615Application Date: 2018-03-29
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Publication No.: US11329650B2Publication Date: 2022-05-10
- Inventor: John J. Parkes, Jr. , Anamul Hoque
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman Lundberg & Woessner, P.A.
- International Application: PCT/US2018/025131 WO 20180329
- International Announcement: WO2019/190526 WO 20191003
- Main IPC: H03F1/30
- IPC: H03F1/30 ; H03K19/0185 ; G05F3/24 ; H03F1/02 ; H03F3/195 ; H03F3/24 ; H03F3/30

Abstract:
An apparatus can include tracking circuitry coupled to a current source and configured to generate a reference voltage signal based on a reference current signal from the current source. The apparatus can include voltage regulator circuitry coupled to the tracking circuitry and configured to generate a voltage supply signal based on the reference voltage signal. The apparatus can further include amplifier circuitry configured to amplify an input signal based on the voltage supply signal. The reference voltage signal can track process and temperature variations associated with at least one field effect transistor within the tracking circuitry. The voltage regulator circuitry can be configured to operate with a closed loop gain higher than 1. The tracking circuitry includes a first transistor connected in parallel with a second transistor, the first and second transistors having a complimentary type with each other (e.g., NMOS and PMOS transistors).
Public/Granted literature
- US20200336144A1 PROCESS AND TEMPERATURE IMMUNITY IN CIRCUIT DESIGN Public/Granted day:2020-10-22
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