Invention Grant
- Patent Title: Integrated circuit and memory
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Application No.: US17084910Application Date: 2020-10-30
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Publication No.: US11335398B2Publication Date: 2022-05-17
- Inventor: Jeong-Jik Na
- Applicant: SK hynix Inc.
- Applicant Address: KR Gyeonggi-do
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2018-0169387 20181226
- Main IPC: G11C7/22
- IPC: G11C7/22 ; G11C11/4091 ; G11C11/4076 ; G11C11/4074 ; G11C11/4094

Abstract:
An integrated circuit may include an amplifier circuit configured to receive a pull-up voltage in response to a pull-up enable signal, receive a pull-down voltage in response to a pull-down enable signal, and amplify a voltage difference between a first line and a second line through the pull-up and pull-down voltages; a first delay path configured to generate the pull-down enable signal by delaying an input signal; and a second delay path configured to generate the pull-up enable signal by delaying the input signal, wherein a change in a delay of the first delay path due to variation of a power supply voltage is smaller than a change in a delay of the second delay path due to the variation.
Public/Granted literature
- US20210050050A1 INTEGRATED CIRCUIT AND MEMORY Public/Granted day:2021-02-18
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