Invention Grant
- Patent Title: Device channel profile structure
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Application No.: US16917451Application Date: 2020-06-30
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Publication No.: US11335683B2Publication Date: 2022-05-17
- Inventor: Haining Yang , ChihWei Kuo , Junjing Bao
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Muncy, Geissler, Olds & Lowe, P.C.
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L29/10 ; H01L29/78 ; H01L29/06 ; H01L29/423 ; H01L29/786 ; H01L29/66 ; H01L21/02 ; H01L21/8238

Abstract:
A transistor channel profile structure may be improved to provide better transistor circuits performance. In one example, a transistor circuit may include different fin profiles for the NMOS transistors and the PMOS transistors, such as the NMOS fins are thicker than the PMOS fins or the NMOS fin has a straight vertical surface and the PMOS fin has a notch at a fin bottom region. In still another example, a transistor circuit may include different nano-sheet profiles for a NMOS GAA device and a PMOS GAA device where the NMOS nano-sheet is thicker than the PMOS nano-sheet. Such configurations optimize the NMOS and the PMOS transistors with the NMOS having a low channel resistance while the PMOS has a lower short channel effect.
Public/Granted literature
- US20210407998A1 DEVICE CHANNEL PROFILE STRUCTURE Public/Granted day:2021-12-30
Information query
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