- Patent Title: Memory device having 2-transistor memory cell and access line plate
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Application No.: US17003077Application Date: 2020-08-26
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Publication No.: US11335684B2Publication Date: 2022-05-17
- Inventor: Kamal M. Karda , Karthik Sarpatwari , Haitao Liu , Durai Vishak Nirmal Ramaswamy
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: H01L27/00
- IPC: H01L27/00 ; H01L29/00 ; H01L27/105 ; H01L27/12 ; H01L29/788 ; H01L29/24 ; H01L29/786

Abstract:
Some embodiments include apparatuses and methods using a substrate, a pillar having a length perpendicular to the substrate, a first conductive plate, a second conductive plate, a memory cell located between the first and second conductive plates and electrically separated from the first and second conductive plates, and a conductive connection. The first conductive plate is located in a first level of the apparatus and being separated from the pillar by a first dielectric located in the first level. The second conductive plate is located in a second level of the apparatus and being separated from the pillar by a second dielectric located in the second level. The memory cell includes a first semiconductor material located in a third level of the apparatus between the first and second levels and contacting the pillar and the conductive connection, and a second semiconductor material located in a fourth level of the apparatus between the first and second levels and contacting the pillar.
Public/Granted literature
- US20210066298A1 MEMORY DEVICE HAVING 2-TRANSISTOR MEMORY CELL AND ACCESS LINE PLATE Public/Granted day:2021-03-04
Information query
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